00001 /*-------------------------------------------------------------------------- 00002 * reg24lu1.h 00003 * 00004 * Keil C51 header file for the Nordic Semiconductor nRF24LU1 2.4GHz RF 00005 * transceiver with embedded 8051 compatible microcontroller and USB. 00006 * 00007 * 00008 *------------------------------------------------------------------------*/ 00009 #ifndef __REG24LU1_H__ 00010 #define __REG24LU1_H__ 00011 00012 //----------------------------------------------------------------------------- 00013 // Byte Registers 00014 //----------------------------------------------------------------------------- 00015 00016 sfr P0 = 0x80; 00017 sfr SP = 0x81; 00018 sfr DPL = 0x82; 00019 sfr DPH = 0x83; 00020 sfr DPL1 = 0x84; 00021 sfr DPH1 = 0x85; 00022 sfr PCON = 0x87; 00023 sfr TCON = 0x88; 00024 sfr TMOD = 0x89; 00025 sfr TL0 = 0x8A; 00026 sfr TL1 = 0x8B; 00027 sfr TH0 = 0x8C; 00028 sfr TH1 = 0x8D; 00029 sfr CKCON = 0x8E; 00030 sfr RFCON = 0x90; 00031 sfr DPS = 0x92; 00032 sfr P0DIR = 0x94; 00033 sfr P0ALT = 0x95; 00034 sfr S0CON = 0x98; 00035 sfr S0BUF = 0x99; 00036 sfr IEN2 = 0x9A; 00037 sfr USBCON = 0xA0; 00038 sfr CLKCTL = 0xA3; 00039 sfr PWRDWN = 0xA4; 00040 sfr WUCONF = 0xA5; 00041 sfr INTEXP = 0xA6; 00042 sfr IEN0 = 0xA8; 00043 sfr IP0 = 0xA9; 00044 sfr S0RELL = 0xAA; 00045 sfr REGXH = 0xAB; 00046 sfr REGXL = 0xAC; 00047 sfr REGXC = 0xAD; 00048 sfr RSTRES = 0xB1; 00049 sfr SMDAT = 0xB2; 00050 sfr SMCTL = 0xB3; 00051 sfr TICKDV = 0xB5; 00052 sfr IEN1 = 0xB8; 00053 sfr IP1 = 0xB9; 00054 sfr S0RELH = 0xBA; 00055 sfr SSCONF = 0xBC; 00056 sfr SSDATA = 0xBD; 00057 sfr SSSTAT = 0xBE; 00058 sfr IRCON = 0xC0; 00059 sfr CCEN = 0xC1; 00060 sfr CCL1 = 0xC2; 00061 sfr CCH1 = 0xC3; 00062 sfr CCL2 = 0xC4; 00063 sfr CCH2 = 0xC5; 00064 sfr CCL3 = 0xC6; 00065 sfr CCH3 = 0xC7; 00066 sfr T2CON = 0xC8; 00067 sfr P0EXP = 0xC9; 00068 sfr CRCL = 0xCA; 00069 sfr CRCH = 0xCB; 00070 sfr TL2 = 0xCC; 00071 sfr TH2 = 0xCD; 00072 sfr PSW = 0xD0; 00073 sfr WDCON = 0xD8; 00074 sfr USBSLP = 0xD9; 00075 sfr ACC = 0xE0; 00076 sfr RFDAT = 0xE5; 00077 sfr RFCTL = 0xE6; 00078 sfr AESCS = 0xE8; 00079 sfr MD0 = 0xE9; 00080 sfr MD1 = 0xEA; 00081 sfr MD2 = 0xEB; 00082 sfr MD3 = 0xEC; 00083 sfr MD4 = 0xED; 00084 sfr MD5 = 0xEE; 00085 sfr ARCON = 0xEF; 00086 sfr B = 0xF0; 00087 sfr AESKIN = 0xF1; 00088 sfr AESIV = 0xF2; 00089 sfr AESD = 0xF3; 00090 sfr AESIA1 = 0xF5; 00091 sfr AESIA2 = 0xF6; 00092 sfr FSR = 0xF8; 00093 sfr FPCR = 0xF9; 00094 sfr FCR = 0xFA; 00095 00096 //----------------------------------------------------------------------------- 00097 // Word Registers 00098 //----------------------------------------------------------------------------- 00099 00100 sfr16 CC1 = 0xC2; 00101 sfr16 CC2 = 0xC4; 00102 sfr16 CC3 = 0xC6; 00103 sfr16 CRC = 0xCA; 00104 sfr16 T2 = 0xCC; 00105 00106 //----------------------------------------------------------------------------- 00107 /* Lint uses a trick (see co-kc51.lnt) where sbit gets treated like (expanded to) a bool. 00108 This causes errors due to the strong type checking of _Bool (and thereby bool) that 00109 is turned on in our implementation of stdbool.h. 00110 Therefore, we suppress Lint warning 18 ("Redeclaration") for the sbit-s declared in this file. 00111 */ 00112 00113 /*lint -e18 */ 00114 //----------------------------------------------------------------------------- 00115 00116 //----------------------------------------------------------------------------- 00117 // Bit Definitions 00118 //----------------------------------------------------------------------------- 00119 00120 /* FSR */ 00121 sbit MCDIS = FSR^7; 00122 sbit STP = FSR^6; 00123 sbit WEN = FSR^5; 00124 sbit RDYN = FSR^4; 00125 sbit INFEN = FSR^3; 00126 sbit RDIS = FSR^2; 00127 sbit RDEND = FSR^1; 00128 sbit WPEN = FSR^0; 00129 00130 /* PSW */ 00131 sbit CY = PSW^7; 00132 sbit AC = PSW^6; 00133 sbit F0 = PSW^5; 00134 sbit RS1 = PSW^4; 00135 sbit RS0 = PSW^3; 00136 sbit OV = PSW^2; 00137 sbit F1 = PSW^1; 00138 sbit P = PSW^0; 00139 00140 /* TCON */ 00141 sbit TF1 = TCON^7; 00142 sbit TR1 = TCON^6; 00143 sbit TF0 = TCON^5; 00144 sbit TR0 = TCON^4; 00145 sbit IE1 = TCON^3; 00146 sbit IT1 = TCON^2; 00147 sbit IE0 = TCON^1; 00148 sbit IT0 = TCON^0; 00149 00150 /* S0CON */ 00151 sbit SM0 = S0CON^7; 00152 sbit SM1 = S0CON^6; 00153 sbit SM20 = S0CON^5; 00154 sbit REN0 = S0CON^4; 00155 sbit TB80 = S0CON^3; 00156 sbit RB80 = S0CON^2; 00157 sbit TI0 = S0CON^1; 00158 sbit RI0 = S0CON^0; 00159 00160 /* T2CON */ 00161 sbit T2PS = T2CON^7; 00162 sbit I3FR = T2CON^6; 00163 sbit I2FR = T2CON^5; 00164 sbit T2R1 = T2CON^4; 00165 sbit T2R0 = T2CON^3; 00166 sbit T2CM = T2CON^2; 00167 sbit T2I1 = T2CON^1; 00168 sbit T2I0 = T2CON^0; 00169 00170 /* IEN0 */ 00171 sbit EA = IEN0^7; 00172 00173 sbit ET2 = IEN0^5; 00174 sbit ES0 = IEN0^4; 00175 sbit ET1 = IEN0^3; 00176 sbit EX1 = IEN0^2; 00177 sbit ET0 = IEN0^1; 00178 sbit EX0 = IEN0^0; 00179 00180 /* IEN1 */ 00181 sbit EXEN2 = IEN1^7; 00182 00183 sbit WUIRQ = IEN1^5; 00184 sbit USB = IEN1^4; 00185 sbit USBWU = IEN1^3; 00186 sbit SPI = IEN1^2; 00187 sbit RF = IEN1^1; 00188 sbit RFSPI = IEN1^0; 00189 00190 /* IRCON */ 00191 sbit EXF2 = IRCON^7; 00192 sbit TF2 = IRCON^6; 00193 sbit WUF = IRCON^5; 00194 sbit USBF = IRCON^4; 00195 sbit USBWUF = IRCON^3; 00196 sbit SPIF = IRCON^2; 00197 sbit RFF = IRCON^1; 00198 sbit RFSPIF = IRCON^0; 00199 00200 /* USBCON */ 00201 sbit SWRST = USBCON^7; 00202 sbit WU = USBCON^6; 00203 sbit SUSPEND = USBCON^5; 00204 sbit IV4 = USBCON^4; 00205 sbit IV3 = USBCON^3; 00206 sbit IV2 = USBCON^2; 00207 sbit IV1 = USBCON^1; 00208 sbit IV0 = USBCON^0; 00209 00210 /* PORT0 */ 00211 sbit P00 = P0^0; 00212 sbit P01 = P0^1; 00213 sbit P02 = P0^2; 00214 sbit P03 = P0^3; 00215 sbit MCSN = P0^3; 00216 sbit SCSN = P0^3; 00217 sbit P04 = P0^4; 00218 sbit P05 = P0^5; 00219 00220 /* RFCON */ 00221 sbit RFCE = RFCON^0; 00222 sbit RFCSN = RFCON^1; 00223 sbit RFCKEN = RFCON^2; 00224 00225 /* WDCON */ 00226 sbit BD = WDCON^7; 00227 00228 /* AESCS */ 00229 sbit GO = AESCS^0; 00230 sbit DECR = AESCS^1; 00231 00232 /*lint +e18 */ /* Re-enable Lint warning 18 */ 00233 00234 00235 /* REGX commands */ 00236 #define RWD 0x00 00237 #define WWD 0x08 00238 #define RGTIMER 0x01 00239 #define WGTIMER 0x09 00240 #define RRTCLAT 0x02 00241 #define WRTCLAT 0x0A 00242 #define RRTC 0x03 00243 #define WRTCDIS 0x0B 00244 #define RWSTA0 0x04 00245 #define WWCON0 0x0C 00246 #define RWSTA1 0x05 00247 #define WWCON1 0x0D 00248 00249 //----------------------------------------------------------------------------- 00250 // Interrupt Vector Definitions 00251 //----------------------------------------------------------------------------- 00252 00253 #define INTERRUPT_EXT_INT0 0 // External Interrupt0 (P0.3) 00254 #define INTERRUPT_T0 1 // Timer0 Overflow 00255 #define INTERRUPT_AES_RDY 2 // AES ready interrupt 00256 #define INTERRUPT_T1 3 // Timer1 Overflow 00257 #define INTERRUPT_UART0 4 // UART0, Receive & Transmitt interrupt 00258 #define INTERRUPT_T2 5 // Timer2 Overflow 00259 #define INTERRUPT_RF_RDY 8 // RF SPI ready interrupt 00260 #define INTERRUPT_RFIRQ 9 // RF interrupt 00261 #define INTERRUPT_SPI 10 // SPI interrupt 00262 #define INTERRUPT_USB_WU 11 // USB wakeup interrupt 00263 #define INTERRUPT_USB_INT 12 // USB interrupt 00264 #define INTERRUPT_WU 13 // Internal wakeup interrupt 00265 00266 //----------------------------------------------------------------------------- 00267 // Header File Preprocessor Directive 00268 //----------------------------------------------------------------------------- 00269 00270 #endif
1.7.2