Enumerations | Functions

Serial Peripheral Interface (hal_spi)
[nRF24LE1 HAL]


The Serial Peripheral Interface (SPI) is double buffered and can be configured to work in all four SPI modes. The default is mode 0.

The SPI connects to the following pins of the device: MMISO, MMOSI, MSCK. The SPI Master function does not generate any chip select signal (CSN). The programmer typically uses another programmable digital I/O to act as chip selects for one or more external SPI Slave devices.

This module contains functions for initializing the SPI master; reading and writing single and multiple bytes from/to the SPI master; and flushing the SPI RX FIFO.

Enumerations

enum  hal_spi_clkdivider_t {
  SPI_CLK_DIV2, SPI_CLK_DIV4, SPI_CLK_DIV8, SPI_CLK_DIV16,
  SPI_CLK_DIV32, SPI_CLK_DIV64, SPI_CLK_DIV128, SPI_CLK_DIV2,
  SPI_CLK_DIV4, SPI_CLK_DIV8, SPI_CLK_DIV16, SPI_CLK_DIV32,
  SPI_CLK_DIV64, SPI_CLK_DIV128
}
enum  hal_spi_byte_order_t { HAL_SPI_LSB_MSB, HAL_SPI_MSB_LSB, HAL_SPI_LSB_MSB, HAL_SPI_MSB_LSB }
enum  hal_spi_mode_t {
  HAL_SPI_MODE_0, HAL_SPI_MODE_1, HAL_SPI_MODE_2, HAL_SPI_MODE_3,
  HAL_SPI_MODE_0, HAL_SPI_MODE_1, HAL_SPI_MODE_2, HAL_SPI_MODE_3
}

Functions

void hal_spi_master_init (hal_spi_clkdivider_t ck, hal_spi_mode_t mode, hal_spi_byte_order_t bo)
uint8_t hal_spi_master_read_write (uint8_t pLoad)
void hal_spi_slave_init (hal_spi_mode_t mode, hal_spi_byte_order_t bo)
uint8_t hal_spi_slave_rw (uint8_t pLoad)
uint8_t hal_spi_slave_read (void)
void hal_spi_slave_preload (uint8_t pLoad)
_Bool spi_slave_data_ready (void)
_Bool hal_spi_slave_csn_high (void)

Enumeration Type Documentation

Available SPI clock divide factors The input argument of hal_spi_master_init must be defined in this enum

Enumerator:
SPI_CLK_DIV2 

CPU clock/2

SPI_CLK_DIV4 

CPU clock/4

SPI_CLK_DIV8 

CPU clock/8

SPI_CLK_DIV16 

CPU clock/16

SPI_CLK_DIV32 

CPU clock/32

SPI_CLK_DIV64 

CPU clock/64

SPI_CLK_DIV128 

CPU clock/128

SPI_CLK_DIV2 

CPU clock/2

SPI_CLK_DIV4 

CPU clock/4

SPI_CLK_DIV8 

CPU clock/8

SPI_CLK_DIV16 

CPU clock/16

SPI_CLK_DIV32 

CPU clock/32

SPI_CLK_DIV64 

CPU clock/64

SPI_CLK_DIV128 

CPU clock/128

Definition at line 41 of file hal_spi.h.

SPI data order (bit wise per byte) on serial output and input The input argument of hal_spi_master_init must be defined in this enum

Enumerator:
HAL_SPI_LSB_MSB 

LSBit first, MSBit last

HAL_SPI_MSB_LSB 

MSBit first, LSBit last

HAL_SPI_LSB_MSB 

LSBit first, MSBit last

HAL_SPI_MSB_LSB 

MSBit first, LSBit last

Definition at line 55 of file hal_spi.h.

SPI operating modes. The input argument of hal_spi_master_init must be defined in this enum

Enumerator:
HAL_SPI_MODE_0 

MSCK/SSCK is active high, sample on leading edge of MSCK/SSCK

HAL_SPI_MODE_1 

MSCK/SSCK is active high, sample on trailing edge of MSCK/SSCK

HAL_SPI_MODE_2 

MSCK/SSCK is active low, sample on leading edge of MSCK/SSCK

HAL_SPI_MODE_3 

MSCK/SSCK is active low, sample on trailing edge of MSCK/SSCK

HAL_SPI_MODE_0 

MSCK/SSCK is active high, sample on leading edge of MSCK/SSCK

HAL_SPI_MODE_1 

MSCK/SSCK is active high, sample on trailing edge of MSCK/SSCK

HAL_SPI_MODE_2 

MSCK/SSCK is active low, sample on leading edge of MSCK/SSCK

HAL_SPI_MODE_3 

MSCK/SSCK is active low, sample on trailing edge of MSCK/SSCK

Definition at line 63 of file hal_spi.h.


Function Documentation

void hal_spi_master_init ( hal_spi_clkdivider_t  ck,
hal_spi_mode_t  mode,
hal_spi_byte_order_t  bo 
)

Function to initialize and enable the SPI master.

< The value of bit 3

< The value of bit 0

Definition at line 22 of file hal_spi.c.

{
  SPIMCON0 = 0;                           // Default register settings
  switch (ck)                             // Set desired clock divider
  {
    case SPI_CLK_DIV2:
      SPIMCON0 |= (0x00 << 4);
      break;
    case SPI_CLK_DIV4:
      SPIMCON0 |= (0x01 << 4);
      break;
    case SPI_CLK_DIV8:
      SPIMCON0 |= (0x02 << 4);
      break;
    case SPI_CLK_DIV16:
      SPIMCON0 |= (0x03 << 4);
      break;
    case SPI_CLK_DIV32:
      SPIMCON0 |= (0x04 << 4);
      break;
    case SPI_CLK_DIV64:                   // We use clock divder 64 as default
    default:
      SPIMCON0 |= (0x05 << 4);
      break;  
  }
  switch(mode)                            // Set desired mode
  {
    case HAL_SPI_MODE_0:
      SPIMCON0 |= (0x00 << 1);
      break;
    case HAL_SPI_MODE_1:
      SPIMCON0 |= (0x01 << 1);
      break;
    case HAL_SPI_MODE_2:
      SPIMCON0 |= (0x02 << 1);
      break;
    case HAL_SPI_MODE_3:      
      SPIMCON0 |= (0x03 << 1);
      break;
  }
  
  if(bo == HAL_SPI_LSB_MSB)               // Set desired data order
  {
    SPIMCON0 |= BIT_3;
  }

  SPIMCON0 |= BIT_0;                      // Enable SPI master
}
uint8_t hal_spi_master_read_write ( uint8_t  pLoad )

Function to read/write a byte on the SPI master. This function writes a byte to the SPI master, then enters an infinite loop waiting for the operation to finish. When the operation is finished the SPI master interrupt bit is cleared and the received byte is returned

Parameters:
pLoadbyte to write
Returns:
The read byte

Definition at line 71 of file hal_spi.c.

{
  SPIMDAT = pLoad ;                       // Write data to SPI master
  while(!(SPIMSTAT & 0x04))               // Wait for data available in rx_fifo
  ;
  return SPIMDAT;                         // Return data register
}
void hal_spi_slave_init ( hal_spi_mode_t  mode,
hal_spi_byte_order_t  bo 
)

Function to initialize and enable the SPI slave.

Definition at line 79 of file hal_spi.c.

{
  uint8_t temp;
  SPISCON0 = 0xF0; //default register settings
  I3FR=1; 
  INTEXP |= 0x01; //gate SPI slave interrupt to INT3
  
  switch(mode)
  {
    case 0:
      SPISCON0 |= 0;
      break;
    case 1:
      SPISCON0 |= (1 << 1);
      break;
    case 2:
      SPISCON0 |= (2 << 1);
      break;
    case 3:      
      SPISCON0 |= (3 << 1);
      break;
  }
  SPISCON0 |= (~(byte_order & 0x01)) << 3; 

  //enable SPI slave
  SPISCON0 |= 0x01;
  while((SPISSTAT & 0x01))
  temp=SPISDAT; //flush rx fifo
}
uint8_t hal_spi_slave_rw ( uint8_t  pLoad )

Function to read/write a byte on the SPI slave. This function enters an infinite loop waiting for the data to be ready. Then the data is saved and the byte is written to the SPI slave. When the operation is finished the received byte is returned.

Parameters:
pLoadbyte to write
Returns:
The read byte

Definition at line 109 of file hal_spi.c.

uint8_t hal_spi_slave_read ( void   )

Function to read the data register of SPI slave

Returns:
The read byte .

Definition at line 153 of file hal_spi.c.

{
  while(!(sstat_shadow & 0x01))
  {
    sstat_shadow |= SPISSTAT;
  }
  sstat_shadow &= ~0x01;

  return SPISDAT;
}
void hal_spi_slave_preload ( uint8_t  pLoad )

Function to write data to the SPI slave.

Parameters:
pLoadbyte to write

Definition at line 164 of file hal_spi.c.

{
  SPISDAT=pLoad;
}
_Bool spi_slave_data_ready ( void   )

Function to check if data is available in RX FIFO of SPI slave.

Returns:
Status of rxDataReady bit

Definition at line 139 of file hal_spi.c.

{
  sstat_shadow |= SPISSTAT;

  if(sstat_shadow & 0x01)
  {
    return true;  
  }
  else
  {
    return false;
  }   
}
_Bool hal_spi_slave_csn_high ( void   )

Definition at line 118 of file hal_spi.c.

{
  static bool csn_high = true;
  sstat_shadow |= SPISSTAT;

  if(sstat_shadow & 0x20)
  {
    csn_high = true;  
  }
  else
  {
    if(sstat_shadow & 0x10)
    {
      csn_high = false;
    }
  }
  sstat_shadow &= ~0x30;
  
  return csn_high;
}