00001 /* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved. 00002 * 00003 * The information contained herein is confidential property of Nordic 00004 * Semiconductor ASA.Terms and conditions of usage are described in detail 00005 * in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. 00006 * 00007 * Licensees are granted free, non-transferable use of the information. NO 00008 * WARRENTY of ANY KIND is provided. This heading must NOT be removed from 00009 * the file. 00010 * 00011 * $LastChangedRevision: 133 $ 00012 */ 00013 00017 #include "nrf24lu1p.h" 00018 #include "hal_spi.h" 00019 00020 #define SPI_DATA 0x01 00021 #define SPI_START 0x02 00022 #define SPI_STOP 0x04 00023 00024 void hal_spi_master_init(hal_spi_clkdivider_t ck, hal_spi_mode_t mode, hal_spi_byte_order_t bo) 00025 { 00026 uint8_t smctl; 00027 uint8_t temp = mode; // mode is not used in nRF24LU1 00028 temp = bo; // byte_order is not used in nRF24LU1 00029 00030 I3FR = 1; // rising edge SPI ready detect 00031 P0EXP = 0x01; // Map SPI master on P0 00032 INTEXP = 0x02; // Select SPI master on IEX3 00033 SPIF = 0; // Clear any pending interrupts 00034 switch(ck) 00035 { 00036 case SPI_CLK_DIV2: 00037 smctl = 0x11; 00038 break; 00039 00040 case SPI_CLK_DIV4: 00041 smctl = 0x12; 00042 break; 00043 00044 case SPI_CLK_DIV8: 00045 smctl = 0x13; 00046 break; 00047 00048 case SPI_CLK_DIV16: 00049 smctl = 0x14; 00050 break; 00051 00052 case SPI_CLK_DIV32: 00053 smctl = 0x15; 00054 break; 00055 00056 case SPI_CLK_DIV64: 00057 default: 00058 smctl = 0x16; 00059 break; 00060 } 00061 SMCTL = smctl; // Enable SPI master with the specified divide factor 00062 } 00063 00064 uint8_t hal_spi_master_read_write(uint8_t pLoad) 00065 { 00066 SPIF = 0; // Clear interrupt request 00067 SMDAT = pLoad; // Start the SPI operation by writing the data 00068 while(SPIF == 0) // Wait until SPI has finished transmitting 00069 ; 00070 return SMDAT; // Return the the read byte 00071 }
1.7.2